Brusey20 2.6 Category: tool
gs 31 August 2003; 10:48
a tool which converts state diagrams into synthesizable VHDL. After entering state diagrams with XFig, you run brusey20 on the exported .PIC file to yield a behavioral VHDL description of your state machine. This VHDL code is suitable for synthesis using Exemplar's tools.
  License: GPL homepage download

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