OpenCollector Database

Covered 20080415	Category: tool
Trevor Williams 15 April 2008; 22:44

Covered is a Verilog code coverage utility that reads in a Verilog design and generated VCD/LXT dumpfile (or runnable in VPI module form) from that design and generates a coverage file that can be merged with other coverage files and/or used to create a coverage report. Covered also contains the coverage report utility that reads in a coverage file to produce human-readable coverage reports viewable in ASCII or GUI form. Areas of coverage measured by Covered are: line, toggle, memory, combinational logic, FSM state and FSM state transition, and assertion coverage.

Update
Code optimizations to score command, GUI enhancements and memory leak fixes.

License: GPL

Qucs 0.0.14	Category: tool
gs 10 April 2008; 14:29

Qucs is a circuit simulator with a graphical user interface. It aims to support all kinds of circuit simulation types, e.g. DC, AC, S parameter, and harmonic balance analysis. Qucsator, the simulation backend, is a command line circuit simulator. It takes a network list in a certain format as input and outputs a Qucs dataset. It has been programmed for usage in the Qucs project but may also be used by other applications.

Update
The new release comes with a few new components, i.e., diac, triac, thyristor, logarithmic amplifier, HICUM L0 v1.12, potentiometer, equation defined RF device and MESFET (Curtice, Statz, TOM-1 and TOM-2). The Qucs-Transcalc tool now also contains synthesis and analysis of coplanar line types. Printing under Win32 has been finally fixed. Support for sub- and super-script in graphical text paintings have been added. Last but not least 3- and more argument versions of PlotVs() have been added to the equation solver capabilities.

License: GPL

Rockbox Player	Category: design
gs 20 March 2008; 11:15

A project to design and build a Free/Open hardware audio player and recorder, for use with RockBox. The intention is to make up for the lack of recent commercial audio players supported by Rockbox by producing a free design available for manufacture.

License: Other

Free Telephony Project	Category: library
gs 20 March 2008; 11:03

The goal of this project is to provide free hardware designs for telephone systems. Both the hardware and software are open. You are free to copy, modify and re-use the hardware designs. The hardware for a complete embedded Asterisk IP PBX (including multiple analog ports or a T1/E1) can be built for a few hundred dollars.

The first product available is the IP04, a low cost phone system that can switch phone calls from analog phones or phone lines over the Internet using VoIP.

Blackfin Linux Project	Category: library
gs 20 March 2008; 10:54

The Blackfin Linux Project is the central repository and workspace for free or open source software and open hardware projects targeted for use with certain members of the Analog Devices Blackfin processor family.

Boards are generally developed using gEDA and PCB, and schematics available under the GPL.

Clean Room Design Practice	Category: announcement
gs 19 March 2008; 14:24

Wade D. Peterson of Silicore (the people who created the free Wishbone SOC architecture) has written a major new paper on clean room design practice, full of detail on the legal aspects of reverse engineering and practical methods for separating copyright and patent governed aspects of a design, essential for creating open and interoperable designs.

Update
Wade has written a short summary of the key technique he's proposing: the CLASS machine.

gEDA participates in GSoC 2008	Category: announcement
Stuart Brorson 19 March 2008; 14:20

The gEDA project has been accepted into this year's Google Summer of Code (GSoC) as a mentoring organization! The gEDA project is excited to have this opportunity again (second year for gEDA in GSoC!) and thanks Google for investing in and organizing the GSoC program. Students and mentors, please visit the gEDA GSoC 2008 page. Project ideas and suggestions can be found on the project page.

py2port 1.0	Category: tool
Charles 12 March 2008; 07:41

py2port is a Python based tool for performing two-port and one-port analysis on linear circuits. It was developed for analyzing PCB Power-Distribution-Systems and Lossy Transmission Lines.

License: GPL

THUD 0.25	Category: tool
gs 15 February 2008; 04:58

THUD is a register transfer level (RTL) simulation environment optimized for cycle-based designs. The design is expressed in TH, a Scheme-based hardware description language (HDL) that supports basic 1/0/x operators and hierarchical instantiation. THUD can be used in batch mode or through one of its interactive faces.
Primitives are provided for session management; file format translation; scheduling; data structure examination; compilation; HDL generation; and of course, simulation. Additionally, the entire Scheme development environment afforded by GUILE is present. The distribution also includes a QA environment; documentation in Info and HTML formats: a user's manual and a semi-literate internals doc; and some examples.

Update
THUD has a new home, and is now in Git instead of RCS.

License: GPL

gEDA 1.4	Category: tool
gs 3 February 2008; 11:04

gEDA is a suite of electronic design automation (EDA) tools. Currently, the project offers a mature suite of free software applications for electronics design, including schematic capture, attribute management, bill of materials (BOM) generation, netlisting into over 20 netlist formats, analog and digital simulation, and printed circuit board (PCB) layout.

Update
The current major stable release of gEDA/gaf!

License: GPL

Page maintainer: graham@opencollector.org